Showing posts with label Verilog AMS. Show all posts
Showing posts with label Verilog AMS. Show all posts

Wednesday, November 20, 2019

A Voltage Controlled Voltage Source with a Table defined dependency designed in Verilog AMS

As a second part of the post from a few days back, this time it is presented a voltage controlled voltage source with a table defined dependency. In many cases, there are SPICE models that include this type of controlled source as a part of the circuit, and this element, designed basically in Verilog AMS module, allows to cover this type of necesities.

Go and visit the "Verilog AMS Files" section of this site and you will find the links to the documentation and the files that are necessary to run in QUCS Studio this new controlled source.

Saturday, November 16, 2019

A New Voltage Controlled Voltage Source with polynomial dependency for QUCS Studio

In QUCS Studio it is possible to find the basic controlled sources that are common in all the CAD tools. But there are other options for controlled sources that would be interesting for modelling devices and that it can be modeled in QUCS Studio using the Verilog AMS capabilities of the tool.

In the section "Verilog AMS Files" of this site it is now possible to find the description of the design process and the files necessaries to work with a new type of Voltage Controlled Voltage Source for QUCS Studio where the dependency is a polynomial expression of a determined independent voltage.