Wednesday, November 20, 2019

A Voltage Controlled Voltage Source with a Table defined dependency designed in Verilog AMS

As a second part of the post from a few days back, this time it is presented a voltage controlled voltage source with a table defined dependency. In many cases, there are SPICE models that include this type of controlled source as a part of the circuit, and this element, designed basically in Verilog AMS module, allows to cover this type of necesities.

Go and visit the "Verilog AMS Files" section of this site and you will find the links to the documentation and the files that are necessary to run in QUCS Studio this new controlled source.

No comments:

Post a Comment